Overview

This book constitutes the refereed proceedings of the 10th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2000, held in Gottingen, Germany in September 2000.
The 33 revised full papers presented were carefully reviewed and selected for inclusion in the book. The papers are organized in sections on RTL power modeling, power estimation and optimization, system-level design, transistor level design, asynchronous circuit design, power efficient technologies, design of multimedia processing applications, adiabatic design and arithmetic modules, and analog-digital circuit modeling.

ISBN-13

9783540410683

ISBN-10

3540410686

Weight

1.82 Pounds

Dimensions

6.10 x 0.80 x 9.25 In

List Price

$54.99

Edition

1st Edition

Format

Paperback

Language

English

Pages

xii, 338 pages

Publisher

Springer

Published On

2000-09-01



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